Mega Drive Game Load (Sega Mega-Tech)

depending on which game you insert, the 68k and z80 come out of reset differently choose a mega drive game like sonic the hedgehog 2 for mega drive load if you are unsure which type of game you have, measure with a multimeter in the cartridge between the !m3 (pin b30) and ground (a1 / a32) b30 is the third pin in from the right when looking at the game, and grounds are the outer 2 pins on the back plane if the pin is shorted, it is a master system game detecting mega drive games the 315 5308 is responsible for querying the cartridge slots !m3 (pin 78) this pin left floating high means it is a mega drive game (not a mark 3 master system game) if you observe the 315 5308 !m3 (pin 78) during boot, if the game is a mega drive game it will remain high all the time it is best to do this test with a single game inserted so you know the m3 line is always related to that cartridge game loading game data involves many circuits 68k main game processing 315 5313 work ram control and video processing 315 5308 controls 68k/z80/wram/vram bus control flow z80 mostly game audio the 68k is mostly responsible for reading in and processing the cartridge game data the 315 5313 processes the video data and controls the 68k work ram (!uwr, !lwr, !oe0, !cas0 and !ras0) all address / data pins of the cartridge ultimately connect to the 68k (through buffers) !mres for cartridge reset is controlled by ??? and should always be high once the sms system releases the mega drive to boot !cas0 goes to the 315 5313 !ce0 is used to enable (when low) the game rom these are controlled by ic70 demultiplexer 74f138 !header oe is used to enable (when low) the header rom !as is the address strobe output from the 68k !dtack is the data transfer acknowledge to the 68k (this is controlled by multiple things not just the cartridge so will still pulse without a cartridge) !uwr and !lwr stay high until a game has loaded then start pulsing as the upper/lower ram get used !vres is the system reset and should always be high just after !mres this is tied directly to the 68k reset !time is not important for game load !m3 is grounded by the cartridge to be in master system mode confirmation stage of boot it is important to first figure out at what stage the console thinks it is in this starts with detecting if the no cartridge operation seems valid, then if the game detect seems valid, and finally if a game looks like it has successfully loaded once you confirm that, if you get to game load and still have no av output you can look more at the av portion of the system below are some key points to probe with an oscilloscope to easily detect if you are at a certain stage initial operation the initial operation confirms the 68k and glue logic chips appear to be operational and running as expected with the console turned on and a game inserted, set a trigger to capture a rise/fall on the 68k reset line and observe for the following the 68k and 315 xxx chips should come out of reset, while reading the header rom, then go into reset, and come out again when attempting to then load the game rom if loading a mega drive game, on the second reset high pulse (game rom load) the 68k !dtack, !cas0, !as and !asel should all pulses low if the game load fails it will be just a few times then remain high here is an example of the second high reset pulse on a failed game load (blue is reset pin, red is !as pin) the 68k address 1 (pin 29) will pulse a few pulses when booting cartridge present there are only a few checks needed to confirm if the system realises there is a game inserted when cart is in, it should pull the !cart pin to ground measure it with a multimeter to confirm on the mega tech this is sent through the i/o port expander ic24 on port c reading game headers the sms z80 reads the port c of the i/o expander to determine which cartridge slots have their !cart pin low indicating a game is present after this, for each game starting at 8 and working back, it reads the header rom that means when the system wants to read from the cartridge at all it first sets ce0 to low when it wants to read header information it sets the !header oe to low, and !cas0 to high when it wants to read the game rom it sets the !header oe to high and !cas0 to low the !ce0 pins are controlled by the 74f138 demultiplexer ic70 the !header oe pins are controlled by the 74f138 demultiplexer ic41 the !cas0 pins are controlled by the 74f138 demultiplexer ic39 for all of the demultiplexers a0/1/2 follow the truth table for which cartridge is being controlled !e0 is always low e2 is always high !e1 is high then pulses low during the time the output is being controlled to check if the z80 sees a game present, observe the data pins coming out of the i/o expander into the sms z80 data pins from port c, for them going low once it is detected, you should be able to observe an attempt to read the game header first by probing the !header oe pins (ic41 pins 7, and 9 to 15) pulsing low and the !ce0 (ic70 pins 7, and 9 to 15) pulsing low the same, and finally the !cas0 pins (ic39 pins 7, and 9 to 15) going high on each cartridge right after out of reset the cartridges go in order, so !q0 (pin 15) is cartridge slot 1 and !q7 (pin 7) is cartridge slot 8 during the period when the header is being read the pin constantly pulses, it doesn't just stay low see below an example where the game header is being read in the first half note game headers are read from cartridge slot 8 first, and slot 1 last if you do not see the expected signals on the cas0, !header oe or !ce0 pins, check the a0, a1 and a2 pins as well as !e pins which control the output pins todo complete trace pinout for these chips you should also then see the 68k data and address pins toggling systems check ok the mega drive does a basic system checks on initial boot, which ensures the 315 5313 can communicate with the 315 5308 and 315 5309 once this communication is established it reads the game data by releasing the bus master to the 68k (through the 315 5348) and if it is valid and the game starts, it brings the z80 out of reset game loading once the system has initialized, the 315 5313 should send its !bgack (pin 100) high going to the 315 5348 (pin 4), which in turn outputs it releases its pin 17 going to the 68k !bgack (pin 12) allowing it to float high and become bus master at this point the 68k starts to toggle its address lines reading in the data from the data bus (ultimately going to the game cartridge) and load the game once loaded, the !bgack pin will periodically (every frame, 50/60hz), assert low handing over control to the z80 (i presume, haven't checked) for about 200us here is how the !reset, !bgack, data and address pins look during boot failed game load the most consistent way i have found to detect a failed game load on a mega drive game is observer the a5 address pin of the 68k as shown above in yellow if the game fails to load, it will stop right after the game load section and go low and stay low if you observer the d5 data pin, it will do similar but float high once it has failed game loaded the final check is if the game has successfully loaded capture on the 68k reset line, a period before the second rise is when the game rom is read so after the header has been read the !header oe pin should go high, and the !ce0 and !cas0 should start toggling low to enable the game rom, followed by the address and data pins toggling to read the data the confirmation of successful load is ultimately the !bgack pin starts to toggle low (releasing control to the z80 for audio processing) the !ce0 pins are controlled by the 74f138 demultiplexer ic70 the !header oe pins are controlled by the 74f138 demultiplexer ic41 the 74f138 sends the cartridge pins low when the a0 to a2 pins are changed usually, a bad game stops reading almost instantly and the reset line with go back low address 1 of the 68k (pin 29) is a good place to monitor, and if it stops fast then something is wrong (the data, the enable pins, the cartrige pins etc ) so the data read in is invalid and game loads stops if you see constant activity it's a good sign the game is running also !uwr and !lwr (also go to 68k pins 7 and 8) only pulse when game has loaded, otherwise always high so, if you see activity on these pins, it is another confirmation finally, you should see !dtack, !cas0, !as and !asel are all also constantly pulsing cartridge detect (mega tech) the sms z80 uses the ic24 cxd1095q port expander to read the pin b26 (what is !asel on mega drive) pins of each cartridges i presume b26 on the mega tech cartridges is !cart i am 99% sure of this as the cartridges also sink b26 to ground there are 8 bits to the port expander, and 5 ports, meaning the z80 can interface with 5 different bytes of information coming from 5 sources (except for port x which is only 4 bits) when port c is selected on the i/o expander, it maps the sms z80 data pins to pin b26 (!cart) slot 1 to 8 are pins pc0 through 7 which then map to the z80 d0 7 the z80 basically reads a single byte in which tells it which of the 8 cartridges are present by which bits are low 16 bit data path the 68k data pins all pass through two transceivers ic50 and ic53 above the 68k these are 74245 bus transceivers the dir pins 1 are connected together and controlled by the 315 5349 to the right of it, on pin 5 the dir also go to the ic52 74hc244 octal buffer pin 17 (2a4 input) the !oe pins 19 are connected together and controlled by the 315 5349 to the right of it, on pin 12 both dir and !oe should pulse constantly during out of reset metadata loading the 68k zd lower byte of data (d0 7) goes into the a bus of the transceiver above it ( ic53 74hc245) the 68k zd upper byte of data (d8 15) goes into the a bus of the transceiver above it ( ic50 74hc245) the b buses go to the cartridge data pins 23 bit address path the address pins a1 23 all pass through a bunch of 74hc244 octal buffers the first byte of the address a1 a8 go through the ic38 on the 8 inputs the second byte of the address a9 16 go through ic40 on the 8 inputs the last 7 bits of the address a17 23 go through ic42 on 7 of the 8 inputs then all the outputs map to the cartridge address pins the !oe are tied to vcc , and the !2oe are enabled by the 315 5348 pin 20 all address and data pins on all 8 cartridges are tied together checking traces here is a trace map for checking continuity black screen on parts of games one thing to be aware of is parts of some games, like sonic 2 intro demo right after the player 1 / player 2 screen, can show as black when using some monitors (or in my case an ossc), as certain games can use a mode called interlace mode 2 thanks to david656 and mourix for the insight from ukvac com forums sonic 2's 2 player mode uses the megadrive's interlace mode 2, which allows the system to output a 320x448 image by alternating between even and odd lines every frame this allows the game to display two full screens' worth of graphics, at the cost of effectively halving the frame rate to 30