MAX77620 CPU Regulator
maxAfter we have confirmed we have no shorts on the VSYS rail, a working BQ24193 and we are powering the console from a bench power supply at VBAT we can move on to turning on the console with tweezers and testing the motherboards main chips.
Starting with the MAX77620 which is responsible for most of the CPU core voltages, RAM and other key components, as well as sending the "enable" signal to the other second-stage regulators when the time comes.
The MAX77620 receives permanent power from the BQ charger via the VSYS pin.
To power on the EN0 pin (BGA ball C7) gets sunk low for a soft-on button. This is directly connected to the top pin on the power ribbon through a 150 ohm resistor just above it.
Alternatively, there is a test point for EN0 on both sides of the board you can short to ground to turn on bypassing the ribbon connector and 150R resistor (in case either are faulty).
Simply short ground to EN0 test point on CPU side here.
Alternatively, you can short the EN0 pin right next to the MAX77620 on the MAX side.
You can also solder on an LED as shown if you want that LED to light up every time the power button is pressed.
The MAX77620 has several power rails that enable at different stages of boot.
The VSYS comes from the BQ charger and is permanently present so long as there is power in the battery.
Then no other rails are enabled until pin EN0 of the chip is sunk low. This pin is connected to the power switch ribbon as mentioned above.
Once EN0 is sunk low, the MAX77620 enables all stage 1 rails (indicated in the image with a single *).
Once the CPU reads valid data from the eMMC it tries to enter stage 2 boot, at which time the rails with ** should enable also, and the rails with only one * and not both will turn off.
If you see * then the power will only be available while in stage 1 boot.
If you see ** then the power will only be available while in stage 2 boot.
If you see * ** then the power will be present at both stage 1 and 2 (so will be present from pressing power button until sleep/off)
īģŋ