LCD Circuit (Atari Lynx II)

note here are my quick notes to help people diagnose the issues with no contrast on the lcd check your backlight tube is lit firstly or use a torch from behind to see the screen if not the job of this circuit is to send pulsing differential paired signals ranging from around 12 to 22v to the lcds tpr2 and vss/vdd pins (so two pairs of complimentary signals), whereby the higher the voltage the more the lcd crystals twist allowing more light through, and "turning on" the display to see a visual of all of the lcd pins checkout this youtube video tldr; signals overview ( 75hz 75hz / 60hz 60hz ) pin signal name signal voltage range 1 5v dc 5v 2 5v dc 5v 3 dbl 3 94khz 3 94khz / 3 146khz 3 146khz square wave 0 to 5v 4 p3 15 75khz 15 75khz / 12 58khz 12 58khz square wave 0 to 5v 5 p2 31 55khz 31 55khz / 25 16khz 25 16khz square wave 0 to 5v 6 p4 (hsync) 7 877khz 7 877khz / 6 29khz 6 29khz square wave 0 to 5v 7 p1 63khz 63khz / 50khz 50khz square wave 0 to 5v 8 vm dc hayato = 1 4 2 7v mikey = 4 0 5 8v (low voltage contrast) 9 cl2 (hsync) 158us pulses ( 7 877khz 7 877khz / 6 29khz 6 29khz ) 0 to 5v 10 vd2 dc hayato = 2 2 4 4v mikey = 4 0 5 9v (low voltage contrast) 11 clock b1 80x 500ns pulses low 0 to 5v 12 clock a1 80x 500ns pulses high 0 to 5v 13 clock b2 80x 500ns pulses low 0 to 5v 14 clock a2 80x 500ns pulses high 0 to 5v 15 clock b3 80x 500ns pulses low 0 to 5v 16 clock a3 80x 500ns pulses high 0 to 5v 17 dl1 pixel data pulses 0 to 5v 18 dl3 pixel data pulses 0 to 5v 19 dl0 pixel data pulses (missing on mikey vlsi variant) 0 to 5v 20 dl2 pixel data pulses 0 to 5v 21 reset (vsync) 382us low pulse every 13 33ms 13 33ms / 16 68ms 16 68ms 0 to 5v 22 lcdvdd 4khz 4khz / 3 2khz 3 2khz pulses 12 to 22v 23 lcdtpr2 4khz 4khz / 3 2khz 3 2khz pulses 12 to 22v 24 lcdvss 4khz 4khz / 3 2khz 3 2khz pulses 12 to 22v 25 gnd lcd enable (low to turn on lcd) hayato = 0 74v mikey = 4v (lcd shorts it to ground) 26 gnd dc 0v 5v and ground pins not much to say about these pins going into the lcd obviously the power and ground pins to drive the lcd driver ic integrated into the lcd ribbon dbl (contrast) pin the dbl pin drives the starting point of the contrast circuit which ultimately generates the +/ 22v rails of lcdvdd/tpr2/vss p1/2/3/4 pins the p1/2/3/4 pins to me look like a phase lock loop set of signals, to generate square wave forms of various frequencies likely used in the contrast and lcd circuit for displaying pixels vm/vd2 pins these are part of the voltage divider of the 5v rail to generate a low voltage version of the contrast wheel position cl2 (hsync) pin this pin is the 158us active high pulses for hsync which tells the lcd to start a new line reset (vsync) pin this pin is the 13 33ms / 16 68ms active low pulses for vsync which tells the lcd to start a new frame, for a 75 or 60 fps redraw clock pins the three groups of clock pins are used to drive each of the three driver ic chips installed on the lcd ribbon itself they control one third of the lcd dl0/1/2/3 (pixel data) pins these are the 4 pins used to send actual rgb pixel data to the lcd the pixel data is sent by the hayato, but generated by the suzy lcd vdd/vss/tpr2 (contrast) pins for more information about the contrast circuit that generates the + 22v signals for lcdvdd/tpr2/vss, check out the game gear lcd circuit topic which is covered in more depth, but has an almost identical circuit structure follow the same diagnostics steps if you are missing the contrast voltages working forward from