LCD Circuit (Atari Lynx II)
NOTE: Here are my quick notes to help people diagnose the issues with no contrast on the LCD. Check your backlight tube is lit firstly or use a torch from behind to see the screen if not.
The job of this circuit is to send pulsing differential paired signals ranging from around 12 to 22V to the LCDs TPR2 and VSS/VDD pins (so two pairs of complimentary signals), whereby the higher the voltage the more the LCD crystals twist allowing more light through, and "turning on" the display.
To see a visual of all of the LCD pins checkout this YouTube video.
Pin | Signal Name | Signal | Voltage Range |
1 | 5V | DC | 5V |
2 | 5V | DC | 5V |
3 | DBL | īģŋ3.94kHz / 3.146KhZ square wave | 0 to 5V |
4 | P3 | īģŋ15.75kHz / 12.58kHz square wave | 0 to 5V |
5 | P2 | īģŋ31.55kHz / 25.16kHz square wave | 0 to 5V |
6 | P4 (HSYNC) | īģŋ7.877kHz / 6.29kHz square wave | 0 to 5V |
7 | P1 | īģŋ63kHz / 50kHz square wave | 0 to 5V |
8 | VM | DC | HAYATO = 1.4 - 2.7V MIKEY = 4.0-5.8V (low voltage contrast) |
9 | CL2 (HSYNC) | 158us pulses (7.877kHz / 6.29kHz) | 0 to 5V |
10 | VD2 | DC | HAYATO = 2.2 - 4.4V MIKEY = 4.0-5.9V (low voltage contrast) |
11 | CLOCK B1 | 80x 500ns pulses low | 0 to 5V |
12 | CLOCK A1 | 80x 500ns pulses high | 0 to 5V |
13 | CLOCK B2 | 80x 500ns pulses low | 0 to 5V |
14 | CLOCK A2 | 80x 500ns pulses high | 0 to 5V |
15 | CLOCK B3 | 80x 500ns pulses low | 0 to 5V |
16 | CLOCK A3 | 80x 500ns pulses high | 0 to 5V |
17 | DL1 | Pixel data pulses | 0 to 5V |
18 | DL3 | Pixel data pulses | 0 to 5V |
19 | DL0 | Pixel data pulses (missing on Mikey VLSI variant) | 0 to 5V |
20 | DL2 | Pixel data pulses | 0 to 5V |
21 | RESET (VSYNC) | 382us low pulse every 13.33ms / 16.68msīģŋ | 0 to 5V |
22 | LCDVDD | īģŋ4kHz / 3.2kHz pulses | 12 to 22V |
23 | LCDTPR2 | īģŋ4kHz / 3.2kHz pulses | 12 to 22V |
24 | LCDVSS | īģŋ4kHz / 3.2kHz pulses | -12 to -22V |
25 | GND | LCD Enable (low to turn on LCD) | HAYATO = 0.74V MIKEY = 4V (LCD shorts it to ground) |
26 | GND | DC | 0V |
Not much to say about these pins going into the LCD. Obviously the power and ground pins to drive the LCD driver IC integrated into the LCD ribbon.
The DBL pin drives the starting point of the contrast circuit which ultimately generates the +/-22V rails of LCDVDD/TPR2/VSS.
The P1/2/3/4 pins to me look like a phase lock loop set of signals, to generate square wave forms of various frequencies likely used in the contrast and LCD circuit for displaying pixels.
These are part of the voltage divider of the 5V rail to generate a low voltage version of the contrast wheel position.
This pin is the 158us active high pulses for HSYNC which tells the LCD to start a new line.
This pin is the 13.33ms / 16.68ms active low pulses for VSYNC which tells the LCD to start a new frame, for a 75 or 60 fps redraw.
The three groups of clock pins are used to drive each of the three driver IC chips installed on the LCD ribbon itself. They control one third of the LCD.
These are the 4 pins used to send actual RGB pixel data to the LCD. The pixel data is sent by the Hayato, but generated by the Suzy.
For more information about the contrast circuit that generates the +-22V signals for LCDVDD/TPR2/VSS, check out the Game Gear LCD Circuit topic which is covered in more depth, but has an almost identical circuit structure.
Follow the same diagnostics steps if you are missing the contrast voltages working forward from
